Technical Program
Paper Detail
| Paper: | DISPS-P1.8 | ||
| Session: | Implementation of Communication Systems | ||
| Location: | Poster Area I | ||
| Session Time: | Wednesday, March 23, 08:30 - 10:30 | ||
| Presentation Time: | Wednesday, March 23, 08:30 - 10:30 | ||
| Presentation: | Poster | ||
| Topic: | Design and Implementation of Signal Processing Systems: Algorithm and architecture co-optimization | ||
| Paper Title: | AN OPTIMUM ARCHITECTURE FOR CONTINUOUS-FLOW PARALLEL BIT REVERSAL | ||
| Authors: | Chen Cheng, Feng Yu, Zhejiang University, China | ||
ICASSP 2016 Patrons
 |
 |
 |
 |
 |
 |
 |
 |
 |
 |
 |
 |
 |
 |
 |
 |
 |
 |